The Tenstorrent team combines technologists from different disciplines who come together with a shared passion for AI and a deep desire to build great products. We value collaboration, curiosity, and a commitment to solving hard problems.
Find out more about our culture.

Cache/Fabric RTL and Microarchitecture Engineer:

RTL design and microarchitecture definition of high-performance microprocessors going into industry leading AI/ML architecture. This senior person coming into this role will define new features and code the RTL across multiple areas of our processor Core. The work is done alongside with a group of highly experienced engineers across various domains of the AI chip.

Responsibilities:

  • Define architecture and logic design requirements by understanding rapidly evolving AI/ML models; work with engineers across domains to understand real world use cases
  • RTL coding in Verilog leveraging on both industry tools as well as open-source infrastructure
  • Drive trade-offs for your logic by working closely with performance, DV and physical design engineers to craft optimal solutions that meet the design goals
  • Deploy innovative techniques for improving power, performance and area of the design, drive experiments with RTL and evaluate synthesis, timing and power results
  • Debug RTL/logic issues across various hierarchies (ex: core, chip) in both pre-silicon and post-silicon environment

Experience and qualifications:

  • BS/MS/PhD in EE/ECE/CE/CS with at least 8 years of experience
  • Experience in Cache, Multi-processor coherency microarchitecure, familarity with AXI, TileLink and CHI protocol
  • Experience with computer architecture/system components/network/fabrics as a part of a CPU, ASIC or SOC design team
  • Expertise in logic design and ability to evaluate functional, performance, timing and power for you design
  • Strong experience with hardware description languages (Verilog, VHDL) and simulators (VCS, NC, Verilator)
  • Expertise in microarchitecture definition and specification development
  • Prior experience in industry standard ISAs – ARM, RISC-V, X86 preferred
  • Strong problem solving and debug skills across various levels of design hierarchies

Locations:

We have presence in Toronto, Austin, Santa Clara, Portland, and Raleigh. We are open to remote candidates on a case by case basis.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been sanctioned by the U.S. government.

As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency information and/or documentation will be required and considered as Tenstorrent moves through the employment process.